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12 Nov 2012

Volume 101, Issue 20, Articles (20xxxx)

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Appl. Phys. Lett. 101, 203102 (2012); http://dx.doi.org/10.1063/1.4747717 (4 pages)

Hyukjin Jung and Ki-Hun Jeong
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Single crystal of LiInSe2 semiconductor for neutron detector

E. Tupitsyn, P. Bhattacharya, E. Rowe, L. Matei, M. Groza, B. Wiggins, A. Burger, and A. Stowe

Appl. Phys. Lett. 101, 202101 (2012); http://dx.doi.org/10.1063/1.4762002 (3 pages) | Cited 1 time

Online Publication Date: 12 November 2012

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Single crystals of semiconductor-grade lithium indium selenide (LiInSe2) were grown using the vertical Bridgman method. The orthorhombic structure of the materials was verified using powder x-ray diffraction. The room temperature band gap of the crystal was found to be 2.85 eV using optical absorption measurements. Resistivity of LiInSe2, obtained using current-voltage measurements, has semiconducting nature (decreases with increasing temperature) and is in order of 1010 Ω·cm. Photoconductivity measurement showed the photocurrent peak at 445 nm. Nuclear radiation devices were fabricated, and alpha particle detection was observed, suggesting that this material could be a candidate for neutron detection applications.
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72.40.+w Photoconduction and photovoltaic effects
29.40.Wk Solid-state detectors

Indium incorporation efficiency and critical layer thickness of (20math1) InGaN layers on GaN

Simon Ploch, Tim Wernicke, Martin Frentrup, Markus Pristovsek, Markus Weyers, and Michael Kneissl

Appl. Phys. Lett. 101, 202102 (2012); http://dx.doi.org/10.1063/1.4767336 (4 pages) | Cited 2 times

Online Publication Date: 12 November 2012

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In this study, the indium incorporation efficiency and critical layer thickness for misfit dislocation formation of thick (20math1) oriented InGaN layers were investigated. InGaN layers with an indium content between 1.7% and 16% were grown by metalorganic vapor phase epitaxy. A reduced In-incorporation efficiency was found in comparison to (0001) oriented layers at 725°C. At lower growth temperature, the difference in incorporation efficiency between the two orientations is reduced. All (20math1) InGaN layers, strained and relaxed with an In-content up to 12%, exhibit smooth surface morphologies with a rms roughness below 1 nm. In contrast to (0001) InGaN, hardly any strain is reduced by 3D-growth. The critical layer thickness for misfit dislocation formation of InGaN (20math1) exhibits a behavior as predicted by the Matthews and Blakeslee model [J. W. Matthews and A. E. Blakeslee, J. Cryst. Growth 27, 118 (1974)]. Deviations, however, indicate that modifications of the formula are needed.
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68.55.ag Semiconductors
61.72.Hh Indirect evidence of dislocations and other defects (resistivity, slip, creep, strains, internal friction, EPR, NMR, etc.)
68.35.bg Semiconductors
81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)
81.05.Ea III-V semiconductors
81.15.Kk Vapor phase epitaxy; growth from vapor phase

Formation of native defects in the γ-ray detector material Cs2Hg6S7

Jino Im, Hosub Jin, Hao Li, John A. Peters, Zhifu Liu, Bruce W. Wessels, Mercouri G. Kanatzidis, and Arthur J. Freeman

Appl. Phys. Lett. 101, 202103 (2012); http://dx.doi.org/10.1063/1.4767368 (4 pages)

Online Publication Date: 13 November 2012

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Semiconductor γ-ray detectors have broad applications, yet finding superior detector materials is a challenge because of its contradictory requirements. Here, we investigated a large set of native defects in Cs2Hg6S7 that has been suggested as a promising candidate for detector materials. Using first-principles calculations, we showed that S-vacancy and HgCs-antisite defect provide life-time limiting deep levels, and Cs-vacancy forms a shallow acceptor level, resulting in low resistivity. To decrease such detrimental effects, concentrations of defects and carriers were examined in various chemical environments, which reveal that carrier densities can be extremely reduced by adjusting Cs partial pressure.
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07.85.Fv X- and γ-ray sources, mirrors, gratings, and detectors

Graphene-GaAs/AlxGa1−xAs heterostructure dual-function field-effect transistor

Chiu-Chun Tang, Ming-Yang Li, L. J. Li, C. C. Chi, and Jeng-Chung Chen

Appl. Phys. Lett. 101, 202104 (2012); http://dx.doi.org/10.1063/1.4767387 (3 pages)

Online Publication Date: 13 November 2012

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We have integrated chemical vapor-deposited graphene and GaAs/AlxGa1−xAs heterostructure into a hybrid field effect transistor (FET). Depending on the operation scheme, graphene can be utilized either as a gate electrode for a GaAs-based high electron mobility transistor (HEMT) or as a channel material gated by two dimensional electron gas (2DEG) formed in the interface of a heterojunction. Our studies reveal that 2DEG can function as an effective back-electrode to tune the ambipolar effect of graphene. The performance of graphene FET (GFET) is limited by the interface band bending of the heterojunction associated with the gating voltages and the intrinsic surface morphology of GaAs substrate. Our results bode a way to implement HEMT/GEFT-based bi-FET integrated circuits.
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85.30.Tv Field effect devices
85.40.-e Microelectronics: LSI, VLSI, ULSI; integrated circuit fabrication technology
81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)

High-mobility p-channel metal-oxide-semiconductor field-effect transistors on Ge-on-insulator structures formed by lateral liquid-phase epitaxy

Yuichiro Suzuki, Shimpei Ogiwara, Takuji Hosoi, Takayoshi Shimura, and Heiji Watanabe

Appl. Phys. Lett. 101, 202105 (2012); http://dx.doi.org/10.1063/1.4766917 (4 pages)

Online Publication Date: 13 November 2012

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High-mobility p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated on germanium-on-insulator (GOI) structures formed by lateral liquid-phase epitaxy (LLPE) from the Si seed areas. It was found that appropriate rapid annealing conditions for LLPE effectively suppress intermixing at the Si seed regions and produce tensile strained single-crystalline Ge layers surrounded by SiO2 microcrucibles. We examined the electrical properties of the thin Ge layers using GOI MOSFETs with back-gate control in the p-type accumulation mode. Excellent transistor performance, such as a low off-leakage current of 1 × 10−7 μA/μm, a high on/off current ratio of 106, and high low-field hole mobility of 480 cm2/Vs, which is 2.8 times higher than that of the reference silicon-on-insulator device, was demonstrated, indicating that the LLPE method provides high-quality local GOI structures and that it is a feasible way to fabricate the next-generation Ge-based devices.
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85.30.Tv Field effect devices
81.15.Lm Liquid phase epitaxy; deposition from liquid phases (melts, solutions, and surface layers on liquids)
81.40.Gh Other heat and thermomechanical treatments
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