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1 May 1983

Volume 42, Issue 9, pp. 759-840

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Electrical measurements on n+‐GaAs‐undoped Ga0.6Al0.4 As‐n‐GaAs capacitors

P. M. Solomon, T. W. Hickmott, H. Morkoç, and R. Fischer

Appl. Phys. Lett. 42, 821 (1983); http://dx.doi.org/10.1063/1.94082 (3 pages) | Cited 32 times

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Current versus voltage (IV) and capacitance versus voltage (CV) characteristics have been measured for n+‐GaAs‐undoped Ga0.6Al0.4 As‐GaAs capacitors over a temperature range of 80–350 K. At low temperatures the structure behaves like a semiconductor‐insulator‐semiconductor diode with interface barrier heights of 0.38 and 0.40 eV for the bottom and top interfaces, respectively. The IV curves exhibit a rectifying behavior due to the formation of a substrate depletion layer, and the CV curves show the formation of the depletion layer under reverse bias as well as an accumulation layer containing >1012 electrons/cm2, in forward bias. The CV curves agree closely with standard theory for SIS structures assuming Fermi–Dirac statistics for electrons in the accumulation layer, within an unaccounted‐for voltage shift of 0.16 V.
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73.40.Ty Semiconductor-insulator-semiconductor structures
73.61.Cw Elemental semiconductors
73.61.Ey III-V semiconductors
73.61.Ga II-VI semiconductors
73.61.Jc Amorphous semiconductors; glasses
73.61.Le Other inorganic semiconductors
72.80.Ey III-V and II-VI semiconductors
77.55.-g Dielectric thin films

Effect of anodic growth temperature on native oxides of n‐(Hg, Cd)Te

E. Bertagnolli, M. Bettini, and E. Gornik

Appl. Phys. Lett. 42, 824 (1983); http://dx.doi.org/10.1063/1.94107 (3 pages) | Cited 1 time

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The insulating behavior of anodically grown native oxides on Cd0.23Hg0.77Te can be improved considerably by performing the anodic process at increased temperatures. For the first time, anodic oxides were grown at 50 °C in the standard ethylene glycol‐KOH‐electrolyte which show a reduction in the high‐frequency (1 MHz) conductivity of the order of one magnitude respective to our room‐temperature grown oxides. A high electrical breakdown voltage (1.5 MV/cm) and a decreased hysteresis shift (50 mV) underline these results. Other oxide parameters such as fixed oxide charges and fast surface states and the excellent dc resistivity remain practically unchanged. Subroom‐temperature grown oxides, however, are extremely unstable.
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73.40.Qv Metal-insulator-semiconductor structures (including semiconductor-to-insulator)
85.30.De Semiconductor-device characterization, design, and modeling

Channeling contrast microscopy: Application to semiconductor structures

J. C. McCallum, C. D. McKenzie, M. A. Lucas, K. G. Rossiter, K. T. Short, and J. S. Williams

Appl. Phys. Lett. 42, 827 (1983); http://dx.doi.org/10.1063/1.94108 (3 pages) | Cited 5 times

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The new technique is demonstrated for the imaging of semiconductor structures. The technique involves the use of a channeled 4He+ microbeam, scanned across the surface to provide a channeling‐contrast image of subsurface lattice disorder and atom location. The present arrangement provides a lateral resolution of ∼5 μm and an in‐depth resolution of ∼30 Å. The technique is applied to the imaging of small, laser annealed regions on ion implanted silicon wafers.
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61.72.U- Doping and impurity implantation
61.85.+p Channeling phenomena (blocking, energy loss, etc.)
79.20.Ds Laser-beam impact phenomena
61.80.Jh Ion radiation effects

Defect nature of the 0.4‐eV center in O‐doped GaAs

D. C. Look, S. Chaudhuri, and J. R. Sizelove

Appl. Phys. Lett. 42, 829 (1983); http://dx.doi.org/10.1063/1.94109 (3 pages) | Cited 19 times

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We have studied the Ec −0.4 eV center in O‐doped GaAs by a combination of temperature‐dependent Hall‐effect measurements, spark‐source mass spectroscopy, and secondary‐ion mass spectroscopy. The conclusion is that neither O nor any other impurity can account for the 0.4‐eV center; therefore, it is a pure defect.
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78.40.Fy Semiconductors
72.20.My Galvanomagnetic and other magnetotransport effects
72.80.Ey III-V and II-VI semiconductors

Lateral dopant transport during laser recrystallization of polysilicon

T. I. Kamins

Appl. Phys. Lett. 42, 832 (1983); http://dx.doi.org/10.1063/1.94079 (3 pages) | Cited 4 times

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Significant lateral dopant transport occurs during seeded laser recrystallization of polysilicon. Both spreading‐resistance measurements and voltage‐contrast scanning electron microscopy show that phosphorus, arsenic, and boron are transported several tens of microns in the direction of the beam travel during recrystallization, while much less transport is observed in the other directions. The dopant motion orthogonal to the beam scan is consistent with liquid‐phase diffusion.
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66.10.C- Diffusion and thermal diffusion
73.61.Cw Elemental semiconductors
73.61.Ey III-V semiconductors
73.61.Ga II-VI semiconductors
73.61.Jc Amorphous semiconductors; glasses
73.61.Le Other inorganic semiconductors
81.40.Gh Other heat and thermomechanical treatments
72.80.Cw Elemental semiconductors

Crystallization of amorphous silicon films during low pressure chemical vapor deposition

E. Kinsbron, M. Sternheim, and R. Knoell

Appl. Phys. Lett. 42, 835 (1983); http://dx.doi.org/10.1063/1.94080 (3 pages) | Cited 30 times

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The crystallization of low pressure chemical vapor deposition amorphous silicon films was studied by transmission electron microscope observations. The results demonstrate the interdependence of the silicon deposition rate, the incubation time for nucleation, and the crystalline growth rate. At temperatures below 600 °C the deposited films are amorphous, but partial crystallization can occur the deposition time is longer than the incubation time. Crystallization occurs through an epitaxial‐like growth from nucleates near or at the substrate interface; the crystalline phase will reach the depositing interface for thick films if the growth rate exceeds the deposition rate. The crystallized fraction of the deposited layer can be controlled by regulating the deposition temperature and rate and by in situ addition of dopant impurities. At temperature higher than 600 °C the deposited films are polycrystalline and columnar in structure. The surface texture is much smoother for films whose surfaces are amorphous.
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81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)
68.55.-a Thin film structure and morphology
07.79.Cz Scanning tunneling microscopes
61.05.-a Techniques for structure determination
81.10.Aj Theory and models of crystal growth; physics and chemistry of crystal growth, crystal morphology, and orientation

A novel technique for studying electric field effect of carrier emission from a deep level center

G. P. Li and K. L. Wang

Appl. Phys. Lett. 42, 838 (1983); http://dx.doi.org/10.1063/1.94081 (3 pages) | Cited 18 times

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A new reverse‐bias pulsed deep level transient spectroscopy technique (RDLTS) is reported for studying the electric field effect of carrier emission from a deep level defect. The technique uses a reverse‐bias pulse whose duration controls the emission of the carriers from a narrow region. The electric field in the region is determined by the pulse height used. The subsequent transient signal due to the capture of carriers by the defect states in the narrow region, in contrast with the emission signal in conventional DLTS, was obtained. The technique is extremely simple to use and requires no additional equipment when using a conventional DLTS setup. Formulation of this approach and the experimental results using this technique were given to illustrate the validity and simplicity of the technique.
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61.72.-y Defects and impurities in crystals; microstructure
63.20.K- Phonon interactions
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