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23 Sep 2002

Volume 81, Issue 13, pp. 2319-2480

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Generation of ballistic electrons in nanocrystalline porous silicon layers and its application to a solid-state planar luminescent device

Yoshiki Nakajima, Akira Kojima, and Nobuyoshi Koshida

Appl. Phys. Lett. 81, 2472 (2002); http://dx.doi.org/10.1063/1.1508165 (3 pages) | Cited 24 times

Online Publication Date: 16 September 2002

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A principle of planar-type visible light emission is presented using ballistic electrons as excitation source. The device is composed of a semitransparent top electrode, a thin film of fluorescent material, a nanocrystalline porous silicon (nc-PS) layer, an n-type silicon wafer, and an ohmic back contact. When a positive dc voltage is applied to the top electrode with respect to the substrate, electrons injected into the nc-PS layer are accelerated via multiple-tunneling through interconnected silicon nanocrystallites, and reach the outer surface as energetic hot or quasiballistic electrons. They directly excite the fluorescent film, and then induce uniform visible luminescence. This solid-state light-emitting device, regarded as a “vacuum-less cathode-ray tube,” has many technological advantages over the conventional luminescent devices. It may lead to big innovations in the development of large-area thin flat-panel display and other electronic devices. © 2002 American Institute of Physics.
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78.60.Fi Electroluminescence
78.67.Bf Nanocrystals, nanoparticles, and nanoclusters
73.63.Bd Nanocrystalline materials
78.66.Db Elemental semiconductors and insulators
73.61.Cw Elemental semiconductors
85.60.Jb Light-emitting devices
73.50.Fq High-field and nonlinear effects

Visualization of 0.1-μm-metal-oxide-semiconductor field-effect transistors by cross-sectional scanning tunneling microscopy

Toshiko Okui, Shigehiko Hasegawa, Hisao Nakashima, Hidenobu Fukutome, and Hiroshi Arimoto

Appl. Phys. Lett. 81, 2475 (2002); http://dx.doi.org/10.1063/1.1509118 (3 pages) | Cited 4 times

Online Publication Date: 16 September 2002

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The device structure of 0.1-μm-metal-oxide-semiconductor field-effect transistors (MOSFETs) has been examined by cross-sectional scanning tunneling microscopy (STM). Topographic STM images display the source/drain, gate, channel, gate oxide, and spacer of the MOSFETs in terms of height, where these regions appear as though they are a different height from each other. The bias voltage dependence of the STM images shows that the contrast observed by STM reflects the differences in carrier densities between the regions in addition to that in the corrugations. The dimensions of these regions as obtained from the images are consistent with the specifications of devices in feature size that we fabricated. © 2002 American Institute of Physics.
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85.30.Tv Field effect devices
85.30.De Semiconductor-device characterization, design, and modeling
68.37.Ef Scanning tunneling microscopy (including chemistry induced with STM)
06.30.Bp Spatial dimensions (e.g., position, lengths, volume, angles, and displacements)
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