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Appl. Phys. Lett. 96, 133508 (2010); http://dx.doi.org/10.1063/1.3361657 (3 pages)

Model of tunneling transistors based on graphene on SiC

Paolo Michetti, Martina Cheli, and Giuseppe Iannaccone

Dipartimento di Ingegneria dell’Informazione Elettronica, Informatica, Telecomunicazioni, Università di Pisa, Via Caruso 16, 56122 Pisa, Italy

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(Received 8 January 2010; accepted 23 February 2010; published online 31 March 2010)

Recent experiments shown that graphene epitaxially grown on Silicon carbide (SiC) can exhibit a energy gap of 0.26 eV, making it a promising material for electronics. With an accurate model, we explore the design parameter space for a fully ballistic graphene-on-SiC tunnel field-effect transistors, and assess the dc and high frequency figures of merit. The steep subthreshold behavior can enable ION/IOFF ratios exceeding 104 even with a low supply voltage of 0.15 V, for devices with gatelength down to 30 nm. Intrinsic transistor delays smaller than 1 ps are obtained. These factors make the device an interesting candidate for low-power nanoelectronics beyond CMOS.

© 2010 American Institute of Physics

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0003-6951 (print)  
1077-3118 (online)

For access to fully linked references, you need to log in.
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