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18 Jan 2010

Volume 96, Issue 3, Articles (03xxxx)

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Appl. Phys. Lett. 96, 033101 (2010); http://dx.doi.org/10.1063/1.3291849 (3 pages)

Ferruccio Pisanello, Luigi Martiradonna, Godefroy Leménager, Piernicola Spinicelli, Angela Fiore, Liberato Manna, Jean-Pierre Hermier, Roberto Cingolani, Elisabeth Giacobino, Massimo De Vittorio, and Alberto Bramati
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Interchain and intrachain emission branching in polymer light-emitting diode doped by organic molecules

D. Krautz, E. Lunedei, J. Puigdollers, G. Badenes, R. Alcubilla, and S. Cheylan

Appl. Phys. Lett. 96, 033301 (2010); http://dx.doi.org/10.1063/1.3276271 (3 pages) | Cited 2 times

Online Publication Date: 20 January 2010

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A blend of the polymer poly[2-(2-ethylhexyloxy)-5-methoxy-1,4-phenylenevinylene] (MEH-PPV) and the electron-transport molecule tris-(8-hydroxyquinoline) aluminum (Alq3) has been investigated by means of electroluminescence and fluorescence spectroscopy, upon variation of the Alq3 content in the blend. A decreased interchain emission is observed upon increasing Alq3 content, due to lower packing of the MEH-PPV chains which leads to a reduction in the interchain interaction, excimer formation, and emission probability. A branching of MEH-PPV interchain and intrachain emissive contributions is clearly time resolved and analyzed as a function of the Alq3 content. At high doping concentration, direct emission from Alq3 molecules is observed.
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85.60.Jb Light-emitting devices
82.45.Wx Polymers and organic materials in electrochemistry
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Nonvolatile nano-floating gate memory devices based on pentacene semiconductors and organic tunneling insulator layers

Soo-Jin Kim, Young-Su Park, Si-Hoon Lyu, and Jang-Sik Lee

Appl. Phys. Lett. 96, 033302 (2010); http://dx.doi.org/10.1063/1.3297878 (3 pages) | Cited 23 times

Online Publication Date: 22 January 2010

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Controlled gold nanoparticle (AuNP)-based nonvolatile memory devices were developed based on pentacene organic transistors and polymethylmethacrylate (PMMA) insulator layers. The memory device had the following configuration: n+Si gate/SiO2 blocking oxide/polyelectrolytes/AuNP/PMMA tunneling dielectric layer/Au source-drain. According to the programming/erasing operations, the memory device showed good programmable memory characteristics with a large memory window. In addition, good reliability was confirmed by the data retention characteristics. The fabrication procedures for the charge trapping and tunneling layers were based on simple solution processes (by dipping and spin-coating) and the maximum processing temperature was <100 °C, so this method has potential applications in plastic/flexible electronics.
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84.30.Sk Pulse and digital circuits
81.05.Fb Organic semiconductors
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