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Applied Physics Letters / Volume 97 / Issue 17 / ELECTRONIC TRANSPORT AND SEMICONDUCTORS

Appl. Phys. Lett. 97, 172101 (2010); http://dx.doi.org/10.1063/1.3506899 (2 pages)

Low-temperature conductance oscillations in junctionless nanowire transistors

Jong-Tae Park1, Jin Young Kim1, Chi-Woo Lee2, and Jean-Pierre Colinge2

1Department of Electronics Engineering, University of Incheon, 12-1 Songdo-dong, Yeong-gu, Incheon 406-772, Republic of Korea
2Tyndall National Institute, University College Cork, Lee Maltings, Dyke Parade, Cork, Ireland

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(Received 27 August 2010; accepted 7 October 2010; published online 25 October 2010)

Junctionless nanowire transistors show more marked oscillations conductance oscillations than inversion-mode devices. These oscillations can be observed at higher temperature, drain voltage, and gate voltage than in surface-channel, inversion-mode multigate metal-oxide-semiconductor field-effect devices. Clear oscillations are observed at 77 K at a drain voltage of 100 mV in devices with a 10×10 nm2 cross section.

© 2010 American Institute of Physics

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KEYWORDS and PACS

Keywords

MOSFET, nanowires

PACS

ARTICLE DATA

Digital Object Identifier
http://dx.doi.org/10.1063/1.3506899

PUBLICATION DATA

ISSN

0003-6951 (print)  
1077-3118 (online)

Publisher

$abstract.society.value is a Member of CrossRef American Institute of Physics

For access to fully linked references, you need to log in.
    J. P. Colinge, C. W. Lee, I. Ferain, N. Dehdashti Akhavan, R. Yan, P. Razavi, R. Yu, A. N. Nazarov, and R. T. Doria, Appl. Phys. Lett. 96, 073510 (2010)APPLAB000096000007073510000001.


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